Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent
1997-10-20
2000-03-07
Moise, Emmanuel L.
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
714733, G01R 3128, H04L 118
Patent
active
060354305
ABSTRACT:
A destroy restoring circuit comprises a fuse and a resistor which generate a signal for setting a destroyed state to stop a function of an output circuit; a fuse and a resistor which generate a signal for restoring to a normal operation state after the setting of the destroyed state; a NOR circuit which logically synthesizes the signals to generate a signal for an output circuit. With this construction, as the function when both of the fuses are cut becomes the same as when the fuses are not cut, the output circuit operates normally.
REFERENCES:
patent: 3760261 (1973-09-01), Collins
patent: 3997818 (1976-12-01), Bodkin
patent: 4344101 (1982-08-01), Oishi et al.
Moise Emmanuel L.
NEC Corporation
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