Semiconductor integrated circuit device manufacturing method

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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Details

C438S199000, C438S014000, C257S369000, C257SE21177

Reexamination Certificate

active

11402862

ABSTRACT:
To reduce variation in channel lengths of MOS transistors within a circuit functional module. When exposure of a wafer substrate having a semiconductor integrated circuit device1including a plurality of CMOS circuit module regions CCM11to CCM22to be subject to substrate bias control formed in a core region10is performed using a step-and-scan type projection exposure apparatus, scanning is performed in the same direction as a longitudinal direction of the respective CMOS circuit module regions CCM11to CCM22. In this device, a gate insulating film is formed on the substrate, a gate electrode material film is formed on the gate insulating film, and a photoresist film is formed on the gate electrode material film.

REFERENCES:
patent: 6064097 (2000-05-01), Hiraga
patent: 6090510 (2000-07-01), Tokuda
patent: 6475862 (2002-11-01), Ando
patent: 6912697 (2005-06-01), Shibata et al.
patent: 2005/0001270 (2005-01-01), Esmark et al.
patent: 2001-156261 (2001-06-01), None
patent: 2004-165649 (2004-06-01), None
patent: 2004-228417 (2004-08-01), None

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