Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent
1997-04-04
1999-02-16
Nelms, David
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
36518908, 365226, 36523003, 36523008, G11C 700, G11C 800
Patent
active
058727370
ABSTRACT:
In a system chip, power supply lines and ground lines are provided independently for input/output buffer circuit, a logic circuit, memory cell array and so on. The word line is held at a negative potential when not selected. At an initial stage of sense amplifier operation, sense amplifier operates with external power supply potential Vcc directly supplied thereto, and after a prescribed time period, it operates receiving internal power supply potential Vcc as output from an internal voltage converting circuit.
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patent: 5555215 (1996-09-01), Nakagome et al.
"Low Voltage Circuit Design Techniques for Battery-Operated and/or Giga-Scale DRAM's", Yamagata, et al, IEEE, vol. 30, No. 11, Nov. 1995, pp. 1183-1188.
"High-Speed/High-band Width Design Methodologies For On Chip DRAM Core Multimedia System LSIs", Tsuruda et al., pp. 265-268, IEEE 1996 Custom Integrated Circuits Conference, May 6, 1996.
Arimoto Kazutami
Tsuruda Takahiro
Mitsubishi Denki & Kabushiki Kaisha
Nelms David
Phan Trong
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