Semiconductor integrated circuit device having clamp circuit for

Static information storage and retrieval – Read/write circuit – Including signal clamping

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36518911, 365203, G11C 700

Patent

active

060612754

ABSTRACT:
A semiconductor memory device supplies data bits to a data bus at extremely short intervals, and a first clamp circuit, a second clamp circuit and a precharge circuit are connected between a constant voltage line at 1.0 volt and the data bus, between two power supply lines at 2.0 volts and the ground level and the data bus and between data lines of the data bus, wherein the precharge circuit balances the data lines around a clamp voltage at 1.2 volts between the data transfer for one data bit and the next data transfer for another data bit, and the second clamp circuit makes the amplitude on the data lines narrow so as to accelerate the successive data transfers.

REFERENCES:
patent: 5058067 (1991-10-01), Kertis
patent: 5307307 (1994-04-01), Wada et al.
patent: 5638328 (1997-06-01), Cho
patent: 5642314 (1997-06-01), Yamaguchi

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