Semiconductor integrated circuit device and manufacturing...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S618000, C438S624000, C438S642000, C438S643000, C257S754000

Reexamination Certificate

active

06815330

ABSTRACT:

BACKGROUND OF THE INVENTION
This invention relates to a semiconductor integrated circuit device and a manufacturing method thereof, in particular, a technique effective when adapted for the so-called damascene method wherein an interconnection having copper as a main conductive layer is formed by cutting a groove in an insulating film, forming a copper film to be embedded in the groove and polishing by CMP (Chemical Mechanical Polishing).
Attendant on the recent tendency to miniaturizing an interconnection in a semiconductor integrated circuit device, a deterioration in the performance of the semiconductor integrated circuit device resulting from an increase in interconnection resistance or interconnection delay has come to be a problem. It has led to a serious problem particularly in a high-performance logic LSI as a factor for disturbing its performance. As described on pages 15 to 21 in the Preprint of 1993 VMIC (VLSI Multilevel Interconnection Conference), a method for forming an interconnection pattern in an interconnection groove by embedding a metal, which has copper (Cu) as a main conductive layer, in an interconnection groove formed in an insulating film and then removing the unnecessary portion of the metal outside the interconnection groove by chemical mechanical polishing (CMP) is now under investigation.
Described in Japanese Patent Application Laid-Open No. Hei 9-306915 is a technique which comprises forming an interconnection groove in a silicon oxide film on a semiconductor substrate, depositing a titanium nitride film and copper film by sputtering, filling the groove with copper by reflow, removing the copper film outside the groove by CMP and then heat treating in a hydrogen atmosphere. According to it, defects in the copper interconnection can be reduced by this technique.
Described in Japanese Patent Application Laid-Open No. Hei 10-56014 is a technique comprising polishing a material, which has a titanium nitride film and tungsten film and is formed over a semiconductor substrate, by CMP and subjecting the polished surface to plasma treatment with a halogen-based mixed gas. According to it, no interconnection short-circuit occurs even if micro scratches are formed by CMP.
Described in Japanese Patent Application Laid-Open No. Hei 10-56014 is a technique comprising forming a photosensitive SOG film over a base on which an interconnection is to be formed, forming an interconnection groove in the SOG film, forming a titanium nitride film, a copper film and a copper titanium alloy film, leaving the films only inside of the interconnection groove by CMP, and heat treating in an ammonia atmosphere to form a titanium nitride film over the surface layer of the copper titanium alloy film.
Described in Japanese Patent Application Laid-Open No. Hei 11-16912 is a technique of subjecting the surface of a through-hole or the like of a copper interconnection formed by the damascene method to plasma treatment in an atmosphere such as ammonia.
SUMMARY OF THE INVENTION
The present inventors have found the below-described problems in the interconnection forming technique, so called damascene method, which comprises forming the above-described interconnection groove, forming a metal film (ex. copper film) to be embedded in the groove and removing the copper film outside the interconnection groove by CMP.
When application of the above-described technique to high-performance logic LSI is considered, a reduction in interconnection resistance is one of the most important problems to be technically investigated. The present inventors therefore are now investigating copper as a metal constituting the interconnection. Copper tends to be diffused in a silicon oxide film, which is an insulating film, compared with another metal (ex. aluminum or tungsten) so that a barrier film covering the interconnection must be studied. As the barrier film in the interconnection groove, a titanium nitride film is studied. As a film (cap film) covering the upper portion of the interconnection, a silicon nitride film is studied. Reliability improvement of the interconnection by covering copper with the titanium nitride film lying on the interconnection groove and the silicon nitride film for capping the upper portion of the interconnection, thereby blocking diffusion of copper into the intrastratum insulating film (silicon oxide film) is under investigation.
When copper is employed as an interconnection material, TDDB (Time Dependence on Dielectric Breakdown) is markedly short compared with another metal material (ex. aluminum or tungsten). The TDDB test is one of acceleration test methods for evaluating the dielectric breakdown resistance between interconnections. According to it, time dependence on dielectric breakdown (lifetime) under the ordinary using condition can be estimated from the time dependence on dielectric breakdown under a higher electric field at a higher predetermined temperature than the ordinary using condition. The TDDB is a lifetime estimated from this TDDB test. The TDDB will be described later in detail.
FIG. 55
is a graph illustrating the measured data of TDDB characteristics of a copper interconnection, an aluminum interconnection and a tungsten interconnection. The TDDB and electric field strength are plotted along the ordinate and abscissa, respectively. When the characteristics (data A) of the aluminum interconnection and those (data B) of the tungsten interconnection are extrapolated, the TDDB at an electric field strength of 0.2 MV/cm (ordinary using condition) easily exceeds 3×10
8
sec (10 years), which is a development target of the present inventors. When the characteristics (data C) of the copper interconnection is extrapolated, on the other hand, there is almost no margin for the development target of 10 years. The aluminum interconnection is formed by film deposition and patterning by photolithography, while the tungsten interconnection is formed by the damascene method similar to the copper interconnection. The copper interconnection and tungsten interconnection differ only in the material. There is no difference in their structures. A marked difference in TDDB characteristics between these two materials suggests that it results from the difference in the interconnection material. Here, the TDDB characteristics are measured at 140° C.
A deterioration in the TDDB characteristics is generally presumed to result from a reduction in the withstand voltage between interconnections due to diffusion of copper, used as an interconnection material, into its surroundings. According to the investigation by the present inventors, however, it is mainly caused by drifting and diffusion of not copper atoms but ionized copper fed from copper oxide or copper silicide at an electric potential between interconnections. Copper is presumed to be mainly diffused from the interface between an insulating film having a copper interconnection formed thereon and a cap film. Described specifically, copper ions are formed from a copper compound such as copper oxide or copper silicide formed over the surface of the copper interconnection and then, such ionized copper drifts and is diffused along the interface between the insulating film wherein an interconnection is to be formed and a cap film by an electric field between interconnections. The copper atoms thus diffused are presumed to increase a leak current. The increase in the leak current heightens thermal stress and finally causes dielectric breakdown at a leak path, leading to the expiration of the lifetime. This mechanism will be described later in detail.
According to the investigation by the present inventors, formation of a multilayered interconnection layer causes a problem that there appears peeling between the lower interconnection and insulating film (cap film) formed thereover in the CMP step for forming an upper interconnection.
In addition, use of a silicon nitride film as a cap film on the copper interconnection is accompanied with the problem that a silicide is formed on the interface between copper and a silicon nit

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