Semiconductor integrated circuit device and its test method

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

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714819, 714707, G01R 3128

Patent

active

059919060

ABSTRACT:
In a semiconductor integrated circuit device having a test circuit, the test time can be shortened and further the circuit activation ratio can be increased, while reducing the circuit scale. In the operation test mode, the counter circuit (10) is divided into the first counter circuit (10a) and the second counter circuit (10b) by use of the test circuit (20). Further, the same input count clock CK is inputted at the same time to both the first and second counter circuits (10a, 10b) in parallel. The normal operation of the counter circuit (10) can be discriminated by checking whether the output signal A of the first counter circuit (10a) matches the output signal B of the second counter circuit (10b) or not.

REFERENCES:
patent: 5371773 (1994-12-01), Ihara et al.
patent: 5703409 (1997-12-01), Fukumitsu et al.

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