Semiconductor integrated circuit device and device for...

Details Semiconductor integrated circuit device and device for... Semiconductor integrated circuit device and device for...

2006-10-31

2006-10-31

Kerveros, James C (Department: 2138)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S726000

Reexamination Certificate

active

07131041

ABSTRACT:
A device for testing a semiconductor integrated circuit device has a test board on which the semiconductor integrated circuit device to be tested is removably mounted, and a two-pulse generator mounted on the test board, for generating two pulses spaced from each other by a pulse interval equal to the period of a test clock for the delay test, from the test clock, and supplying the generated two pulses to the scan path test circuit. The device also has a PLL circuit for multiplying the frequency of the test clock and supplying a signal having the multiplied-frequency to the two-pulse generator.

REFERENCES:
patent: 5519715 (1996-05-01), Hao et al.
patent: 5524114 (1996-06-01), Peng
patent: 5614838 (1997-03-01), Jaber et al.
patent: 5794175 (1998-08-01), Conner
patent: 0 806 837 (1997-11-01), None
patent: 1 024 367 (2000-08-01), None
patent: 8-201481 (1996-09-01), None

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