Semiconductor integrated circuit device

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Signal level or switching threshold stabilization

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326121, H03K 190948, H03K 19003

Patent

active

054163668

ABSTRACT:
Fluctuation of the minimum voltage value allowing determination of the "H" level of an input signal and of maximum voltage value allowing determination of the "L" level of the input signal dependent on the supply voltage is suppressed, in order to enlarge operation margin. A semiconductor integrated circuit device includes a P channel transistor and an N channel transistor constituting a CMOS inverter, an N channel transistor connected in parallel to N channel transistor, and a plurality of N channel transistors for applying a voltage provided by lowering the supply voltage to the gate electrode of N channel transistor, in which a plurality of N channel transistor are connected in series.

REFERENCES:
patent: 4410813 (1983-10-01), Barker et al.
patent: 4595844 (1986-06-01), Shen
patent: 4929853 (1990-05-01), Kim et al.
patent: 4964084 (1990-10-01), Jung et al.
patent: 5041741 (1991-08-01), Steele

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