Semiconductor integrated circuit device

Details Semiconductor integrated circuit device Semiconductor integrated circuit device

1998-02-12

2000-07-04

Nelms, David

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

365233, G11C 1604

Patent

active

060848022

ABSTRACT:
A pipe-line control of internal circuits is performed by an internal clock whose timing does not depend on a predetermined phase difference to the phase of an external clock. To control the timing of the output signal from an output circuit to the predetermined phase difference with respect to the phase of the external clock, a delay circuit is inserted at the subsequent stage of the last stage of pipe-line gate. The delay time of this delay circuit is so controlled as to set the timing of the output signal to have the predetermined phase difference to the phase of the external clock.

REFERENCES:
patent: 5740123 (1998-04-01), Uchida
patent: 5822255 (1998-10-01), Uchida
patent: 5926046 (1999-07-01), Uchida

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