Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Reexamination Certificate
2005-04-19
2005-04-19
Lebentritt, Michael S. (Department: 2824)
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
C365S230020
Reexamination Certificate
active
06882581
ABSTRACT:
A semiconductor integrated circuit is provided which is capable of selecting lines of a data bus to which data is input when the number of bits of input data is different from the number of bits of the data bus with which to input data to be written into a RAM. The semiconductor integrated circuit comprises K-bit data bus lines D0to D7(K is an integer 2 or more) to which data is input; selection circuits SEL (0) to SEL (13) for selecting data input through an N number of the data bus lines on the high bit side or through an N number of the data bus lines on the low bit side based on a set signal when N-bit data is input into the data bus lines (N is an integer smaller than K); and a random access memory (RAM)1for storing data selected by the selection circuit.
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Harness & Dickey & Pierce P.L.C.
Lebentritt Michael S.
Nguyen Tuan T.
Seiko Epson Corporation
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