Semiconductor integrated circuit arrangement fabrication method

Details Semiconductor integrated circuit arrangement fabrication method Semiconductor integrated circuit arrangement fabrication method

2007-10-23

2007-10-23

Kunemund, Robert (Department: 1765)

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

C438S728000, C438S723000, C438S710000, C438S711000, C438S712000, C438S714000, C438S744000, C216S067000, C216S069000, C216S070000, C216S080000

Reissue Patent

active

10094157

ABSTRACT:
To realize etching with a high selection ratio and a high accuracy in fabrication of an LSI, the composition of dissociated species of a reaction gas is accurately controlled when dry-etching a thin film on a semiconductor substrate by causing an inert gas excited to a metastable state in a plasma and a flon gas to interact with each other and selectively obtaining desired dissociated species.

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