Semiconductor integrated circuit arrangement fabrication method

Details Semiconductor integrated circuit arrangement fabrication method Semiconductor integrated circuit arrangement fabrication method

1998-11-10

1999-10-05

Powell, William

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

216 80, 438723, 438737, 438743, H01L 2100

Patent

active

059623470

ABSTRACT:
To realize etching with a high selection ratio and a high accuracy in fabrication of an LSI, the composition of dissociated species of a reaction gas is accurately controlled when dry-etching a thin film on a semiconductor substrate by causing an inert gas excited to a metastable state in a plasma and a flon gas to interact with each other and selectively obtaining desired dissociated species.

REFERENCES:
patent: 4615756 (1986-10-01), Tsujii et al.
patent: 5290383 (1994-03-01), Koshimizu
patent: 5324388 (1994-06-01), Yamano et al.
patent: 5476182 (1995-12-01), Ishizuka et al.

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