Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Signal level or switching threshold stabilization
Reexamination Certificate
2008-05-20
2008-05-20
Tran, Anh Q. (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Signal level or switching threshold stabilization
C326S112000, C326S119000
Reexamination Certificate
active
07375547
ABSTRACT:
An SOI structure semiconductor integrated circuit is disclosed that reduces the number of power supply wires setting substrate potential of a semiconductor element and reduces power consumption. With an SOI structure semiconductor integrated circuit, a first circuit block51does not include a critical path and a second circuit block61does include a critical path. First power supply wiring28supplies a first power supply and second power supply wiring29supplies a second power supply of a high-voltage compared to the first power supply. A wiring section71(P-channel first substrate power supply wiring and P-channel first power supply wiring) supplies the first power supply as a substrate power supply for P-channel elements of the first circuit block51and a source power supply. A wiring section91(P-channel second substrate power supply wiring) supplies the first power supply as a substrate power supply for P-channel elements of a second circuit block61, and a wiring section81(P-channel second power supply wiring) supplies the second power supply as a source power supply for P-channel elements of the second circuit block61.
REFERENCES:
patent: 5266848 (1993-11-01), Nakagome et al.
patent: 6232793 (2001-05-01), Arimoto et al.
patent: 6643208 (2003-11-01), Yamagata et al.
patent: 6831483 (2004-12-01), Shimazaki et al.
patent: 2001-015692 (2001-01-01), None
patent: 2001-332695 (2001-11-01), None
patent: 2004-207694 (2004-07-01), None
English Language Abstract of JP 2001-015692, no month 2001.
R. Puri et al., “Pushing ASIC Performance in a Power Envelope,” DAC 2003, Jun. 2-6, 2003.
English Language Abstract of JP 2004-207694, no month 2004.
English Language Abstract of JP 2001-332695, no month 2001.
Greenblum & Bernstein P.L.C.
Matsushita Electric - Industrial Co., Ltd.
Tran Anh Q.
LandOfFree
Semiconductor integrated circuit and semiconductor... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor integrated circuit and semiconductor..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor integrated circuit and semiconductor... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2750040