Electronic digital logic circuitry – With test facilitating feature
Reexamination Certificate
2011-01-18
2011-01-18
Chang, Daniel D (Department: 2819)
Electronic digital logic circuitry
With test facilitating feature
C326S093000, C714S726000
Reexamination Certificate
active
07872490
ABSTRACT:
A semiconductor integrated circuit includes a plurality of clock gating circuits, a plurality of flip-flops to which transmission of a clock signal is controlled by a respective clock gating circuit, and a clock gating control circuit that controls an active state and an inactive state of the plurality of clock gating circuits, wherein during a test operation mode, the clock gating control circuit controlling the active state and the inactive state of the plurality of clock gating circuits according to a user logic signal, and controlling setting of an arbitrary combination of clock gating circuits to an inactive state regardless of the user logic signal.
REFERENCES:
patent: 2009/0273383 (2009-11-01), Takatori et al.
patent: 10-197603 (1998-07-01), None
patent: 11-108999 (1999-04-01), None
Fukunaga Masayasu
Konishi Hideaki
Chang Daniel D
Fujitsu Semiconductor Limited
Staas & Halsey , LLP
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