Semiconductor integrated circuit and method for testing...

Details Semiconductor integrated circuit and method for testing... Semiconductor integrated circuit and method for testing...

2011-08-23

2011-08-23

Trimmings, John P (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S744000, C714S037000, C714S709000, C714S715000, C714S723000, C713S500000, C713S501000, C375S130000, C375S224000, C375S226000, C375S228000, C332S128000, C327S164000, C327S172000, C702S108000, C702S117000, C324S076520

Reexamination Certificate

active

08006154

ABSTRACT:
A semiconductor integrated circuit includes a clock generator for generating a second clock signal having a frequency that varies over time by using a first clock signal having a fixed frequency, a test circuit for generating a digital signal according to a difference between a first frequency corresponding to the first clock signal and a second frequency corresponding to the second clock signal by a digital logic operation based on the first clock signal and the second clock signal, and a signal path for outputting the digital signal generated by the test circuit.

REFERENCES:
patent: 5631920 (1997-05-01), Hardin
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patent: 6404834 (2002-06-01), Hardin et al.
patent: 7363563 (2008-04-01), Hissen et al.
patent: 7437590 (2008-10-01), Decker et al.
patent: 7759926 (2010-07-01), Nikolov et al.
patent: 2006/0268971 (2006-11-01), Watabe
patent: 2008/0172195 (2008-07-01), Nakadaira
patent: 2009/0179678 (2009-07-01), Hardin et al.
patent: 09-098152 (1997-04-01), None

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