Semiconductor integrated circuit and its evaluating method

Details Semiconductor integrated circuit and its evaluating method Semiconductor integrated circuit and its evaluating method

1997-03-26

2000-08-15

Nguyen, Hoa T.

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

G01R 3128

Patent

active

061051535

ABSTRACT:
A semiconductor integrated circuit has a function circuit, which is composed of flip-flop (F/F) groups 1 and 1 formed by a plurality of flip-flops, a combinational circuit 3 arranged between the F/F groups 1 and 2 and formed by a plurality of paths including various logical gates, a dual input logical gate 5, an output buffer 6 and an input buffer 7. In the combinational circuit 3, there are a plurality of paths, which stretch from the output side of the F/F group 1 to the input side of the F/F group 2. However, only a critical path 20 having a largest delay time is shown. For the plurality of logical gates included in the critical path 20, only an initial stage logical gate 4 is shown and all of the logical gates which are cascade connected thereafter are omitted. Thus, a semiconductor integrated circuit and its evaluating method for easily and inexpensively performing AC testing are provided without increasing a chip size.

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Japanese Patent Office Action, dated Nov. 25, 1997.

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