Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular chip input/output means
Patent
1999-01-07
1999-11-16
Clark, Sheila V.
Active solid-state devices (e.g., transistors, solid-state diode
Gate arrays
With particular chip input/output means
257211, 257207, 257786, H01L 2710
Patent
active
059862947
ABSTRACT:
A semiconductor integrated circuit having three or more layers of wiring is provided with a plurality of lines of bonding pads arranged along the outer peripheral portion of a semiconductor chip. The bonding pads on the inner line side and those on the outer line side are arranged in a zigzag manner. First outgoing wiring for electrically connecting the bonding pads on the inner line side and internal circuits (input/output buffer circuits) is formed in one layer of wiring or a plurality of layers of wiring including at least the uppermost layer of wiring, and second outgoing wiring for electrically connecting the bonding pads on the outer line side and the internal circuits (the input/output buffer circuits) is formed in a plurality of layers of wiring other than the layer in which the first outgoing wiring is formed. Further, the first outgoing wiring and the second outgoing wiring are formed in different layers of wiring and at least one of the outgoing wiring films is formed of a plurality of layers of wiring.
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Katagiri Mitsuaki
Miki Tadayasu
Ogasawara Shigeo
Oka Noriaki
Takahashi Shigeru
Clark Sheila V.
Hitachi , Ltd.
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