Semiconductor integrated circuit

Details Semiconductor integrated circuit Semiconductor integrated circuit

2007-07-24

2008-10-14

Chang, Daniel D (Department: 2819)

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Signal level or switching threshold stabilization

C326S031000, C326S081000, C327S534000, C327S544000

Reexamination Certificate

active

07436206

ABSTRACT:
The present invention provides an integrated circuit capable of reducing a leak current and reliably holding data therein in a standby mode. A potential higher than a potential of a second source line is supplied to a first source line. A potential lower than a potential of a first ground line is supplied to a second ground line. A virtual source line and a virtual ground line are respectively connected to the second source line and the first ground line by switches in an operation mode and float thereby in the standby mode. Substrates of MOS transistors are respectively connected to the second source line and the first ground line by switches in the operation mode and connected to the first source line and the second ground line thereby in the standby mode. A gate circuit transmits an output signal of a data non-holding circuit to a data holding circuit in the operation mode and fixes an input signal of the data holding circuit in the standby mode.

REFERENCES:
patent: 6242948 (2001-06-01), Makino
patent: 6285213 (2001-09-01), Makino
patent: 08-321763 (1996-12-01), None
patent: 11214962 (1999-08-01), None

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