Semiconductor integrated circuit

Details Semiconductor integrated circuit Semiconductor integrated circuit

2007-01-09

2007-01-09

Elms, Richard (Department: 2824)

Static information storage and retrieval

Read/write circuit

Precharge

C365S202000, C365S189080, C365S189110

Reexamination Certificate

active

11114165

ABSTRACT:
Voltage transfer switches and voltage input/output circuits are provided on a complementary bus line pair to be shared among a plurality of columns of a memory cell array. After a complementary bit line pair is precharged to a predetermined voltage, the voltage of uninverted bit line and the voltage of inverted bit line are exchanged before any of all memory cells belonging to the same column is selected by a word line. With this structure, a predetermined potential difference is ensured between the complementary bit line pair at the time of an activation of a sense amplifier even if the total sum of the off-leak currents of access transistors in all the memory cells belonging to the same column is almost as large as the ON-current (drive current) of a single drive transistor.

REFERENCES:
patent: 6343039 (2002-01-01), Agawa et al.
patent: 6501687 (2002-12-01), Choi
patent: 6608786 (2003-08-01), Somasekhar et al.
patent: 2004/0264272 (2004-12-01), Demone
Agawa, K., et al. “A Bit-Line Leakage Compensation Scheme for Low-Voltage SRAM's,” IEEE 2000 Symposium on VLSI Circuits, Digest of Technical Papers, pp. 70-71.

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