Semiconductor integrated circuit

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

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714 30, G01R 3128

Patent

active

059580763

ABSTRACT:
A test unit for testing a random logical circuit and a functional macrocircuit according to a scan test mode signal and a macro test mode signal is provided. The test unit includes a first and a second bidirectional I/O module. Whereas the first bidirectional I/O module is a module for providing a macro test output signal outside or providing a scan test input signal to the random logical circuit, and in addition, for performing input/output processing of a first normal input signal and a first normal output signal with respect to the random logical circuit, the second bidirectional I/O module is a module for providing a macro test input signal to the functional macrocircuit or providing a scan test output signal outside, and in addition, for performing input/output processing of a second normal input signal and a second normal output signal with respect to the random logical circuit.

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patent: 5732091 (1998-03-01), Whetsel

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