Semiconductor integrated circuit

Details Semiconductor integrated circuit Semiconductor integrated circuit

2005-12-06

2005-12-06

Elms, Richard (Department: 2824)

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

C365S205000, C365S222000

Reexamination Certificate

active

06972999

ABSTRACT:
There is disclosed a semiconductor integrated circuit in which an equalize circuit is connected between input nodes N1, bN1of a differential sense amplifier. A latch circuit is connected between nodes N2, bN2. A data change circuit is connected between the nodes N1and bN2and between the nodes bN1and N2. A disconnection circuit is connected between the nodes N1and N2and between the nodes bN1and bN2. In a state in which potentials of the input nodes N1, bN1are equal to each other, the differential sense amplifier is operated, and output data of the amplifier is reversed by the data change circuit and subsequently latched by the latch circuit. The latched data is supplied to the input nodes N1, bN1of the differential sense amplifier.

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Kerry Bernstein, et al., “SOI Circuit Design Concepts”, IBM Microelectronics, Chapter 6.3, pp. 124-129.

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