Static information storage and retrieval – Read/write circuit – Precharge
Patent
1998-07-28
2000-04-04
Zarabian, Arin
Static information storage and retrieval
Read/write circuit
Precharge
G11C 700
Patent
active
060469498
ABSTRACT:
Provided is a semiconductor integrated circuit capable of reducing power consumption in an electric potential converting circuit for converting an electric potential of a bit line. The semiconductor integrated circuit according to the present invention comprises bit lines BL1 and BL2, a precharge circuit PCC which is connected to the bit lines BL1 and BL2, an electric potential converting circuit SA, and a memory cell MC. The electric potential converting circuit SA has a current path for transistors T3, T4 and T6 and a current path for the transistor T3 and transistors T5 and T9 provided between a high potential V2 and a ground potential GND. Respective gate electrodes of the transistors T3, T4, T6 and T9 receive a mode signal PC, and respective gate electrodes of the transistors T4 and T5 are connected to the bit lines BL1 and BL2.
REFERENCES:
patent: 5574687 (1996-11-01), Nakase
patent: 5796665 (1998-08-01), Ternullo
K. Suzuki et al., "A 300 MIPS/W RISC Core Processor with Variable Supply-Voltage Scheme in Variable Threshold-Votage CMOS," IEEE 1997 Custom Integrated Circuits Conference, pp. 587-590.
Mitsubishi Denki & Kabushiki Kaisha
Zarabian Arin
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