Semiconductor inspection method

Details Semiconductor inspection method Semiconductor inspection method

2005-03-22

2005-03-22

Decady, Albert (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C324S765010, C703S013000

Reexamination Certificate

active

06871308

ABSTRACT:
The present invention provides a semiconductor inspection method which detects a short circuit failure of adjacent lines having the possibility of a short circuit occurring, which short circuit failure cannot be detected by the conventional semiconductor inspection methods. The semiconductor inspection method comprises steps of: extracting adjacent lines having the possibility of a short circuit occurring between the lines from a layout patter of a semiconductor (step S101), obtaining input logical values such that one of the adjacent lines has a logical value “1” while the other has a logical value “0” (step S102), and monitoring outputs of a logical circuit which receives the input logical values, thereby to compare the outputs with output logical values which are expected when the input logical values are input to the logical circuit (step S103). Therefore, the short circuit failure of the adjacent lines in the logical circuit can be correctly detected in a short time.

REFERENCES:
patent: 5485094 (1996-01-01), Endoh et al.
patent: 5513188 (1996-04-01), Parker et al.
patent: 5636229 (1997-06-01), Eerenstein et al.
patent: 6202181 (2001-03-01), Ferguson et al.
patent: 6370594 (2002-04-01), Chang et al.

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