Electronic digital logic circuitry – With test facilitating feature
Patent
1996-12-16
1999-08-10
Tokar, Michael
Electronic digital logic circuitry
With test facilitating feature
326 82, 326 86, 326 49, H03K 1900, H03K 190175
Patent
active
059364238
ABSTRACT:
An object of the present invention is to decrease the number of terminals of a semiconductor integrated circuit by utilizing one terminal for a plurality of purposes, and reduce the cost of it, suppressing the performance degradation of the semiconductor integrated circuit. The present invention can be adapted to a semiconductor integrated circuit in which at least one of power supply terminals or ground terminals connected on a power supply path of an output circuit of the semiconductor integrated circuit is installed independently of a power supply path of an internal circuit. In a normal operation mode in which a test mode input terminal .PHI. is low, power is supplied to an output circuit 5 through an output circuit power supply/testing signal input terminal OVDD/TIN. In a test mode in which the test mode input terminal .PHI. is high, the output circuit power supply/testing signal input terminal OVDD/TIN is used to input a signal from outside of the integrated circuit or to output a signal sent from an internal circuit 3. In the test mode, a switching device SW1 on a final stage forming the output circuit is turned OFF by a cutoff circuit, and the terminal OVDD/TIN is disconnected from an output terminal U and can therefore be used as an input terminal for the testing signal.
REFERENCES:
patent: 4996453 (1991-02-01), Zanders et al.
patent: 5585740 (1996-12-01), Tipon
patent: 5652527 (1997-07-01), Phillips et al.
Nariishi Masaaki
Sakuma Yuji
Chang Daniel D.
Kawasaki Steel Corporation
Tokar Michael
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