Static information storage and retrieval – Read/write circuit – Data refresh
Patent
1984-09-06
1987-08-18
Moffitt, James W.
Static information storage and retrieval
Read/write circuit
Data refresh
365227, G11C 700
Patent
active
046881964
ABSTRACT:
The semiconductor memory device includes an internal refresh circuit and an input circuit composed of first and second transistors of a different conductivity type having gates connected in common to an external control signal input terminal and connected in series with each other. A third transistor is connected in series to the first and second transistors. The third transistor is deactivated when the internal refresh circuit, operates to carry out a self-refresh mode, thereby suppressing a power consumption in the input circuit.
REFERENCES:
patent: 4005395 (1977-01-01), Fosler, Jr. et al.
Inagaki Yasaburo
Nakaizumi Kazuo
Gossage Glenn A.
Moffitt James W.
NEC Corporation
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