Semiconductor devices with dual-metal gate structures and...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S351000, C257S371000, C257SE27064, C257SE29128

Reexamination Certificate

active

07378713

ABSTRACT:
Semiconductor devices with dual-metal gate structures and fabrication methods thereof. A semiconductor substrate with a first doped region and a second doped region separated by an insulation layer is provided. A first metal gate stack is formed on the first doped region, and a second metal gate stack is formed on the second doped region. A sealing layer is disposed on sidewalls of the first gate stack and the second gate stack. The first metal gate stack comprises an interfacial layer, a high-k dielectric layer on the interfacial layer, a first metal layer on the high-k dielectric layer, a metal insertion layer on the first metal layer, a second metal layer on the metal insertion layer, and a polysilicon layer on the second metal layer. The second metal gate stack comprises an interfacial layer, a high-k dielectric layer on the interfacial layer, a second metal layer on the high-k dielectric layer, and a polysilicon layer on the second metal layer.

REFERENCES:
patent: 6323115 (2001-11-01), Tanabe et al.
patent: 6821521 (2004-11-01), Robinson et al.
patent: 6831310 (2004-12-01), Mathew et al.
patent: 6855641 (2005-02-01), Ryu et al.
patent: 2006/0166424 (2006-07-01), Schaeffer et al.
patent: 2007/0075351 (2007-04-01), Schulz et al.

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