Semiconductor devices having metal containing N-type and...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer

Reexamination Certificate

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C438S197000, C438S283000

Reexamination Certificate

active

07056776

ABSTRACT:
A semiconductor device has at least two different gate electrodes. The two different gate electrodes include a first gate electrode on a first gate insulation layer. The first gate electrode includes a first metal-containing conductive pattern on the first gate insulation layer and a second metal-containing conductive pattern. A second gate electrode is provided on a second gate insulation layer and includes a third metal-containing conductive material on the second gate insulation layer. The first metal-containing conductive pattern and the third metal-containing conductive pattern have different work functions from each other. A surface of the second metal-containing conductive pattern and a surface of the third metal-containing conductive pattern are substantially planar. Methods of fabrication such semiconductor devices are also provided.

REFERENCES:
patent: 6743704 (2004-06-01), Takahashi
patent: 6894353 (2005-05-01), Samavedam et al.
patent: 2002/0151125 (2002-10-01), Kim et al.
patent: 2004/0180487 (2004-09-01), Eppich et al.
patent: 10-0258881 (2000-06-01), None
patent: 2000-0044674 (2000-07-01), None
patent: 10-0399356 (2003-09-01), None
Wolf “PMOS Devices withp+-Polysilicon Gates”Silicon Processing For The VLSI Era—vol. III chapter 5.8.4 pp. 311-313 Lattice Press (1994).

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