Electronic digital logic circuitry – Significant integrated structure – layout – or layout...
Reexamination Certificate
2010-01-08
2011-12-06
Cho, James H (Department: 2819)
Electronic digital logic circuitry
Significant integrated structure, layout, or layout...
C326S029000, C326S112000
Reexamination Certificate
active
08072243
ABSTRACT:
A semiconductor device is provided. The semiconductor device includes a first circuit provided between a power source voltage line and a ground line, including at least two first MOS transistors coupled in parallel and a second circuit, which is provided between the power source voltage line and the ground line, including at least two second MOS transistors coupled in series. The gate length and the gate width of the first MOS transistor are adjusted so that the first MOS transistor has a gate area allowing a first characteristic variation of the first MOS transistor to be substantially equal to a second characteristic variation of the second MOS transistor.
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Komaki Masaki
Nishiwaki Akifumi
Arent & Fox LLP
Cho James H
Fujitsu Semiconductor Limited
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