Semiconductor device with suppressed crystal defects in...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S240000, C257S241000, C257S503000, C257SE27099, C356S154000

Reexamination Certificate

active

08035169

ABSTRACT:
A technique that makes it possible to suppress a crystal defect produced in an active area and thereby reduce the fraction defective of semiconductor devices is provided. A first embodiment relates to the planar configuration of SRAM. One of the features of the first embodiment is as illustrated in FIG.4. That is, on the precondition that the active areas in n-channel MISFET formation regions are all configured in the isolated structure: the width of the terminal sections is made larger than the width of the central parts of the active areas. For example, the terminal sections are formed in an L shape.

REFERENCES:
patent: 5396100 (1995-03-01), Yamasaki et al.
patent: 5972783 (1999-10-01), Arai et al.
patent: 6501138 (2002-12-01), Karasawa
patent: 6635936 (2003-10-01), Wuu et al.
patent: 6795332 (2004-09-01), Yamaoka et al.
patent: 7738282 (2010-06-01), Liaw
patent: 2007/0007617 (2007-01-01), Nakamura et al.
patent: 2008/0217705 (2008-09-01), Hall et al.
patent: 2007-43082 (2007-02-01), None

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