Semiconductor device with shallow trench isolation and its...

Details Semiconductor device with shallow trench isolation and its... Semiconductor device with shallow trench isolation and its...

2007-05-01

2007-05-01

Vu, David (Department: 2818)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S424000

Reexamination Certificate

active

10882260

ABSTRACT:
A semiconductor device manufacturing method includes the steps of: (a) forming a stopper layer for chemical mechanical polishing on a surface of a semiconductor substrate; (b) forming an element isolation trench in the stopper layer and the semiconductor substrate; (c) depositing a nitride film covering an inner surface of the trench; (d) depositing a first oxide film through high density plasma CVD, the first oxide film burying at least a lower portion of the trench deposited with the nitride film; (e) washing out the first oxide film on a side wall of the trench by dilute hydrofluoric acid; (f) depositing a second oxide film by high density plasma CVD, the second oxide film burying the trench after the washing-out; and (g) removing the oxide films on the stopper layer by chemical mechanical polishing.

REFERENCES:
patent: 6333274 (2001-12-01), Akatsu et al.
patent: 6531377 (2003-03-01), Knorr et al.
patent: 2003/0199151 (2003-10-01), Ho et al.
patent: 11-297811 (1999-10-01), None
patent: 11-297812 (1999-10-01), None
The State Intellectual Property Office of the People's Republic of China dated Apr. 21, 2006 issued corresponding to Japanese Patent Application.

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