Semiconductor device with output buffer control circuit for...

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch

Reexamination Certificate

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C365S233100, C365S219000

Reexamination Certificate

active

08040740

ABSTRACT:
A semiconductor device includes a data compression circuit that performs sequential processes based on timings of an external clock signal. The sequential processes include compressing data input in parallel, latching the compressed data, and outputting the latched data.

REFERENCES:
patent: 5197101 (1993-03-01), Mok
patent: 6189121 (2001-02-01), Ogawa
patent: 6421797 (2002-07-01), Kim
patent: 7058863 (2006-06-01), Kouchi et al.
patent: 7814381 (2010-10-01), Ozeki
patent: 2000-011695 (2000-01-01), None
patent: 2001-338953 (2001-12-01), None

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