Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
1998-10-08
2001-07-10
DeCady, Albert (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C713S152000, C711S163000
Reexamination Certificate
active
06260172
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to an electrically changeable (rewritable) logic integrated circuit with security protection function.
There has been a strong demand for rewritable logic integrated circuits suitable for a shorter term for logic integrated circuit development or modification after shipment. The logic integrated circuits are freely rewritable to constitute circuits with completely different logic functions. And, these logic integrated circuits have been used for communications equipment such as mobile phones, add-on boards of computers, video-game apparatus and Karaoke-apparatus, etc.
On the other hand, virus programs have been spread all over the world to rewrite, without authorization, programs or data stored in rewitable storage media for computers, such as hard disks, floppy discs, BIOS flush memories. The virus programs are infected from one to other computers through communications media or floppy discs, etc. These virus programs have given extensive damage to computer users because some of them destroy the data or programs to cause malfunction of computers.
In order to protect computers from the virus programs, vaccine programs have been widely used as a means for preventing infection of the virus programs or heal the damaged data or program.
For example, Japanese patent Laid-Open No. 8(1996)-179942 describes a computer system with virus program detection function. Further, Japanese patent Laid-Open No. 8(1996)-22390 describes a system for judging whether data or software of a computer is rewritten.
A semiconductor device provided with the security protection function is disclosed in Japanese Patent Laid-Open No. 4(1992)-232588. Particularly, this device is provided with the security protection function for IC cards. The semiconductor device includes a ROM for storing a software for basic control, etc., an EEPROM for storing a program for ciphering and a ciphering key, a RAM for storing identification number of a manufacturer, etc., and a CPU for controlling the ciphering function.
Further, Japanese Patent Laid-Open No. 4(1992)-11420 discloses a one-chip microcomputer provided with a non-volatile memory for storing ID data to be ciphered, a ciphering circuit for ciphering the ID data, a control circuit, etc.
Further, Japanese Patent Laid-Open No. 63(1988)-293637 discloses a one-chip microcomputer provided with a non-volatile memory (ROM) for storing ciphered program and ID data, a volatile memory (RAM) for storing keys for ciphering and deciphering, and a rewritable memory (EEPROM) for storing data ciphered by the ciphering key.
Since the rewritable logic integrated circuits have been used in fields where security protection is required, the same as computers, there is a demand for logic protection function for such rewritable logic integrated circuits against virus programs.
The methods against virus programs described, for example, in Japanese patent Laid-Open Nos. 8(1996)-179942 and -22390 are used for data or software of a computer. However, these cannot be used for logic of rewritable logic integrated circuits. There have been no way to protect logic of rewritable logic integrated circuits from being rewritten without authorization.
Further, in the semiconductor device provided with the security protection function, the EEPROMs of these semiconductor device have relatively large area required for one-bit data, there exists a problem in that a high integration is difficult to achieve. In addition, in these devices, since the secret data are ciphered and deciphered by processing programs by use of a CPU, there exist other problems in that a relatively long time is required to output data and further in that the CPU cannot execute another processing while the data are being output. This device may also be infected by virus to destroy the stored data, thus causing malfunction.
As described above, in the semiconductor devices provided with a security protection function, there exists a problem in that a high integration is difficult and thereby the device cannot be manufactured at a low cost. In addition, the semiconductor devices involve such a problem that the stored data cannot be output at high speed and further another different processing cannot be executed by the arithmetic unit while the data are being output. Further, a normal operation cannot be secured against virus programs.
SUMMARY OF THE INVENTION
With these problems in mind, therefore, it is a first object of the present invention to provide protection of logic of a rewritable logic integrated circuit from being destroyed.
It is a second object of the present invention to provide a semiconductor device with security protection function of stored contents, which can be operated at high speed and manufactured at low cost.
It is a third object of the present invention to provide a storage medium for storing software for activating the semiconductor device to conduct the security protection function.
It is a fourth object of the present invention to provide a semiconductor device with security protection function and capable of non-contact communications with terminal equipment.
To achieve the above-mentioned object, the present invention provides a semiconductor device comprising: a logic integrated circuit having a field programmable gate array storing logic data which is rewritable in response to an external command signal; comparing means for comparing first data being included in at least a reference signal and being related to the logic data of the logic integrated circuit and second data included in a command signal; and control means for controlling rewriting of the logic data according to a result of the comparison.
A method of preventing rewriting of logic may comprise the steps of: comparing a first data related to a first logical state indicating a present state of a logic integrated circuit capable of changing the logic thereof in response to an external command signal and a second data included in the command signal and related to a second logical state of the logic integrated circuit; and prohibiting rewriting of the logic of the logic integrated circuit from the first to the second logical state when the first and second data are not identical to each other. The comparing step may compare at least either one of a first number of logic elements used for constituting the first logical state among a plurality of logic elements included in the logic integrated circuit, a second number of logic elements not used for constituting the first logical state among the plurality of logic elements, addresses of the logic elements used or not used for constituting the first logical state, a code obtained by compressing a signal indicating the first or the second number of elements or the addresses, a date when the logic integrated circuit has been rewritten the logic thereof from the first to the second logical state as the first data with the second data.
A logic judging method may comprise the steps of detecting a first data in response to an external command signal, the first data being related to a first logical state indicating a present state of a logic integrated circuit, the logic being rewritable according to the command signal, comparing the first data with a second data related to a second logical state indicating a state prior to the present state of the logic integrated circuit, and judging that the logic of the logic integrated circuit has been rewritten from the second to the first logical state when the first and second data are not identical to each other. The judging step may output a judging signal when the controller judges that the logic of the logic integrated circuit has been rewritten. The comparing step may compare at least either one of a first number of logic elements used for constituting the second logical state among a plurality of logic elements included in the logic integrated circuit, a second number of logic elements not used for constituting the second logical state among the plurality of logic elements, addresses of the logic elem
Connolly Bove & Lodge & Hutz LLP
De'cady Albert
Nippon Steel Corporation
Ton David
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