Semiconductor device with increased channel length and...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S427000, C438S589000, C257SE21429

Reexamination Certificate

active

07354828

ABSTRACT:
A semiconductor device includes a trench formed in a predetermined portion of a substrate and a first recess region beneath the trench. A field oxide layer is buried into both the trench and the first recess region. An active region is defined by the field oxide layer, having a first active region and a second active region. The latter has a second recess region formed in a lower portion of the active region than the former. A step gate pattern is formed on a border region between the first active region and the second active region. The gate pattern has a step structure whose one side extends to a surface of the first active region and the other side extends to a surface of the second active region. Other embodiments are also described.

REFERENCES:
patent: 6475865 (2002-11-01), Yang et al.
patent: 6573136 (2003-06-01), Hummler
patent: 2004-186557 (2004-07-01), None
patent: 10-0193896 (1999-02-01), None
“80nm 512M DRAM with Enhanced Data Retention Time Using Partially-Insulated Cell Array Transistor (PiCAT)” by Kyoung Hwan Yeo, et al.; 2004 Symposium on VLSI Technology Digest of Technical Papers; 2004IEEE; pp. 30-31.

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