Semiconductor device with asymmetric PMOS source/drain implant a

Details Semiconductor device with asymmetric PMOS source/drain implant a Semiconductor device with asymmetric PMOS source/drain implant a

1997-12-19

2000-11-14

Monin, Jr., Donald L.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438231, 438232, 438286, H01L 218238, H01L 21336

Patent

active

061469343

ABSTRACT:
A PMOS or CMOS device includes an active region with a shallow heavy atom p-type implant. The PMOS device has a substrate, at least one gate electrode disposed on the substrate, and first and second doped active regions disposed adjacent to the gate electrode. The first active region has a higher concentration of a p-type heavy atom dopant material than the second active region. In one method of forming the PMOS device, spacers are formed on sidewalls of the gate electrode. A first p-type dopant material is selectively implanted into active regions adjacent to the gate electrode using the spacers as a mask. Then a portion of one of the spacers is removed to form a thinner spacer and a second p-type dopant material is selectively implanted into a first one of the active regions using the thinner spacer as a mask. The second p-type dopant material is a heavy atom species.

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