Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Patent
1994-01-28
1995-05-09
James, Andrew J.
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
257755, 257757, 257758, 257763, 257764, 257768, 257770, 257774, 257781, H01L 2348, H01L 2944, H01L 2952, H01L 2910
Patent
active
054143020
ABSTRACT:
A high-density semiconductor memory device has a self-aligning contact structure for electrical connection between lower and upper conductive layers, and an inter-insulating layer with a via for forming the contact structure. The contact structure has a contact pad including a first conductive layer electrically connected with the lower conductive layer within the via and formed on a predetermined portion of the inter-insulating layer around the groove, a planarizing material filling up the groove formed on the first conductive layer, and second conductive layers formed on the planarizing material and exposed first conductive layer.
REFERENCES:
patent: 4739384 (1988-04-01), Higashi et al.
patent: 4795722 (1989-01-01), Welch et al.
Yamanaka, T., et al., "A 5.9 .mu.m.sup.2 Super Low Power SRAM Cell Using A New Phase-Shift Lithography", IEDM, 477-480 (1990).
Kawamoto, Y., et al., "A 1.28 .mu.m.sup.2 Bit Line Shielded Memory Cell Technology for 64 Mb DRAMs", Symposium on VLSI Technology, 13-14 (1990).
Chang Sung-nam
Shin Yun-Seung
James Andrew J.
Jr. Carl Whitehead
Samsung Electronics Co,. Ltd.
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