Semiconductor device testing apparatus and method for testing me

Details Semiconductor device testing apparatus and method for testing me Semiconductor device testing apparatus and method for testing me

1997-10-08

1999-12-21

Tu, Trinh L.

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

714718, G01R 3128

Patent

active

060063505

ABSTRACT:
A semiconductor device testing apparatus for a memory- built-in logic LSI or the like, which has a hardware configuration that test patterns for logic and memory sections of the semiconductor device can be described independently of each other.

REFERENCES:
patent: 4348759 (1982-09-01), Schnurmann
patent: 4586181 (1986-04-01), Shimizu
patent: 4905183 (1990-02-01), Kawaguchi et al.
patent: 5337045 (1994-08-01), Shirasaka
patent: 5654971 (1997-08-01), Heitele
patent: 5835506 (1998-11-01), Kuglin

Affiliated with

Also associated with

Rating

Semiconductor device testing apparatus and method for testing me does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor device testing apparatus and method for testing me, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device testing apparatus and method for testing me will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-517069