Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2009-06-15
2011-11-08
Gaffin, Jeffrey A (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S733000, C714S736000
Reexamination Certificate
active
08055961
ABSTRACT:
A semiconductor device test circuit includes a data producing unit to produce first test data to be fed into a semiconductor device, and expected value data; a first data retaining unit to retain the first test data, and feed the first test data into the semiconductor device; a second data retaining unit to retain the expected value data; a comparison unit to compare output data outputted through the first data retaining unit and the expected value data outputted from the second data retaining unit to supply data indicating comparison result between the output data and the expected value data; and a switching unit to switch the data fed into the second data retaining unit between the expected value data and the output data, wherein the first data retaining unit and the second data retaining unit form parts of a scan chain into which second test data may externally be fed.
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Goto Kenji
Yoshino Kazuhide
Fujitsu Limited
Fujitsu Patent Center
Gaffin Jeffrey A
Nguyen Steve
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