Semiconductor device, semiconductor memory device and data...

Details Semiconductor device, semiconductor memory device and data... Semiconductor device, semiconductor memory device and data...

2006-03-09

2008-12-02

Nguyen, Dang T (Department: 2824)

Static information storage and retrieval

Read/write circuit

Signals

C365S233100, C365S191000

Reexamination Certificate

active

07460417

ABSTRACT:
Semiconductor devices having an interface of an open drain or a pseudo-open drain type are provided, and the semiconductor devices include a data strobe (DQS) control signal generating circuit, a DQS control circuit and an output unit. The generating circuit generates a first DQS control signal and a second DQS control signal, and the control circuit controls a data strobe signal by sequentially changing a state of a following section next to a postamble section of the data strobe signal in response to a clock signal; the first and second DQS control signals, from a first logical state of the postamble section to a second logical state, and then from the second logical state to a high impedance state after a first predetermined time. Operations at a high frequency may be possible by controlling a data strobe signal. Related controlling methods are provided.

REFERENCES:
patent: 6215710 (2001-04-01), Han et al.
patent: 6288971 (2001-09-01), Kim
patent: 6940321 (2005-09-01), Heo et al.
patent: 6950370 (2005-09-01), Lee
patent: 2005/0088906 (2005-04-01), Kim
patent: 07-182864 (1995-07-01), None
patent: 10-0307798 (2001-08-01), None
patent: 10-2004-0093858 (2004-11-01), None

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