Semiconductor device manufacturing method

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having junction gate

Reexamination Certificate

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Details

C438S196000, C438S275000

Reexamination Certificate

active

10983618

ABSTRACT:
A plurality of first wiring structures of a first width are arranged periodically at first intervals. A second wiring structure is formed next to one of the first wiring structures. The lower part of the second wiring structure has a second width substantially equal to the sum of n times the first width of the first wiring structure (n is a positive integer equal to two or more) and (n−1) times the first interval.

REFERENCES:
patent: 2006/0081914 (2006-04-01), Miwa
patent: 56-137632 (1981-10-01), None
patent: 11-177070 (1999-07-01), None
patent: 2000-22113 (2000-01-01), None
patent: 2002-176114 (2002-06-01), None
patent: 2003-7870 (2003-01-01), None
patent: 2003-51557 (2003-02-01), None
patent: 10-0190021 (1999-01-01), None

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