Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-01-23
2007-01-23
Lindsay, Jr., Walter (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S236000, C438S628000, C257SE21575
Reexamination Certificate
active
10854162
ABSTRACT:
A semiconductor device manufacturing method is provided which is capable of suppressing variation of the resistance value of resistive interconnection and preventing variation of transistor performance. A gate electrode and a resistive interconnection are formed on a substrate and impurity ions are implanted into the surface of the substrate to form source/drain regions (diffusion layers:1A,1B) on both sides of the gate electrode. Also, impurity ions are implanted to control the resistance value of the resistive interconnection. Next, a sidewall film is formed to cover the resistive interconnection. Then a heat treatment is performed to activate the source/drain regions (diffusion layers:1A,1B).
REFERENCES:
patent: 5471085 (1995-11-01), Ishigaki et al.
patent: 5940699 (1999-08-01), Sumi et al.
patent: 6258708 (2001-07-01), Takahashi
patent: 6436747 (2002-08-01), Segawa et al.
patent: 6469339 (2002-10-01), Onakado et al.
patent: 2-128465 (1990-05-01), None
patent: 2-228065 (1999-09-01), None
patent: 2000-216254 (2000-08-01), None
Lindsay, Jr. Walter
Renesas Technology Corp.
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