Static information storage and retrieval – Read/write circuit – Bad bit
Reexamination Certificate
2005-05-03
2005-05-03
Yoha, Connie C. (Department: 2818)
Static information storage and retrieval
Read/write circuit
Bad bit
C365S185220, C365S185090
Reexamination Certificate
active
06888764
ABSTRACT:
A semiconductor device has an address counter to output, in a first mode, a first block address whereas, in a second mode, a second block address selected from a block-address space two times larger than a block-address space corresponding to memory blocks, the memory blocks and at least one redundant block being included in a memory section, and a block-selection controller, in the second mode, one of the memory blocks, which corresponds to the output of the address counter, when the most significant value of the second block address as the output of the address counter is at a first level whereas select the redundant block while the memory blocks are inhibited from selection, when the most significant value is at a second level.
REFERENCES:
patent: 6072719 (2000-06-01), Tanzawa et al.
patent: 6078525 (2000-06-01), Kuriyama et al.
patent: 6208570 (2001-03-01), Brown et al.
patent: 6262916 (2001-07-01), Kuriyama et al.
patent: 9-288899 (1997-11-01), None
patent: 1997-0072440 (1997-11-01), None
patent: 2000-0066284 (2000-11-01), None
Atsumi Shigeru
Shiga Hitoshi
Taura Tadayuki
Kabushiki Kaisha Toshiba
Yoha Connie C.
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