Semiconductor device including dummy gate part and method of...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S365000, C257S368000, C257S389000, C438S587000, C438S626000

Reexamination Certificate

active

08053845

ABSTRACT:
In a reliable semiconductor device and a method of fabricating the semiconductor device, a difference in height between upper surfaces of a cell region and a peripheral region (also referred to as a level difference) is minimized by optimizing dummy gate parts. The semiconductor device includes a semiconductor substrate including a cell region and a peripheral region surrounding the cell region, a plurality of dummy active regions surrounded by a device isolating region and formed apart from each other, and a plurality of dummy gate parts formed on the dummy active regions and on the device isolating regions located between the dummy active regions, wherein each of the dummy gate parts covers two or more of the dummy active regions.

REFERENCES:
patent: 2005/0285204 (2005-12-01), Kim et al.
patent: 2006/0128082 (2006-06-01), Chuang et al.
patent: 2006/0255394 (2006-11-01), Park
patent: 2007/0117321 (2007-05-01), Park
patent: 10-2001-0038611 (2001-05-01), None
patent: 2002-0036384 (2002-05-01), None
patent: 10-0632655 (2006-09-01), None

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