Semiconductor device including active regions and gate...

Details Semiconductor device including active regions and gate... Semiconductor device including active regions and gate...

2007-04-17

2007-04-17

Vu, Hung (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S206000, C257S513000

Reexamination Certificate

active

10330196

ABSTRACT:
A semiconductor device has p-channel field effect transistors disposed in a lattice shape. In order to generate compression stress in the channel of a p-channel field effect transistor, a long active region of a plurality of transistors is divided for each gate electrode and a sufficiently thin shallow trench isolation (STI) is formed between adjacent gate electrodes. The drain current characteristics can be improved.

REFERENCES:
patent: 2003/0127663 (2003-07-01), Ito
patent: A-07-240501 (1995-09-01), None
patent: 11-340337 (1999-12-01), None
patent: A-2001-044397 (2001-02-01), None
Hamada A., et al,A New Aspect of Mechanical Stress Effects in Scaled MOS Devices, IEEE Transactions on Electron Devices, vol. 38, No. 4, pp. 895-900, Apr. 1991.

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