Semiconductor device including a planarized surface and...

Details Semiconductor device including a planarized surface and... Semiconductor device including a planarized surface and...

2003-04-21

2008-08-19

Schillinger, Laura M (Department: 2813)

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Total dielectric isolation

C438S424000, C438S689000

Reexamination Certificate

active

07413959

ABSTRACT:
A method of planarizing the surface of a semiconductor substrate to reduce the occurrence of a dishing phenomenon. A patterned etch stop layer defining a trench region is formed on a substrate. The substrate is etched to form a trench region, and a medium material layer and an oxide layer are subsequently formed on the substrate, filling the trench region. Chemical mechanical polishing (CMP) is performed on the oxide layer until the medium material layer is exposed. CMP is then performed until the patterned etch stop layer is exposed and a planarized oxide layer is formed. Because the medium material layer has a higher removal rate during CMP than the oxide layer, occurrences of the dishing phenomenon are reduced. A slurry including an anionic surfactant is used to increase the CMP removal ratio of the medium material layer to the oxide layer.

REFERENCES:
patent: 6069057 (2000-05-01), Wu
patent: 6245635 (2001-06-01), Lee
patent: 6268265 (2001-07-01), Hwang et al.
patent: 6461225 (2002-10-01), Misra et al.
patent: 6887137 (2005-05-01), Lee et al.
patent: 6946397 (2005-09-01), Hong et al.
patent: 2002/0087537 (2002-07-01), Evans
patent: 2002/0151177 (2002-10-01), Cherian et al.
patent: 2003/0166381 (2003-09-01), Lee et al.
patent: 2004/0029375 (2004-02-01), Lee et al.
patent: 2005/0106872 (2005-05-01), Hong et al.
patent: 1134947 (1999-05-01), None
patent: 2002-87537 (2002-11-01), None

Affiliated with

Also associated with

Rating

Semiconductor device including a planarized surface and... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor device including a planarized surface and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device including a planarized surface and... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3998159