Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Configuration or pattern of bonds
Patent
1997-10-30
2000-02-15
Fahmy, Wael
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Configuration or pattern of bonds
257787, 257790, 257778, 257691, 257697, 257698, 257668, 257676, H01L 2348, H01L 2941
Patent
active
060256508
ABSTRACT:
This invention relates to a semiconductor device in which a plurality of outer terminals are arranged in a lattice formation on a flat surface. The semiconductor device comprises a semiconductor chip having a plurality of pads, a resin portion sealing said semiconductor chip and a terminal portion in which a prescribed number of pole terminals electrically connected to said pads provided in said semiconductor chip are provided, said pole terminals being exposed from said resin portion. According to the invention, a cost for production is reduced and a reliability and electrical characteristics can be improved.
REFERENCES:
patent: 5293072 (1994-03-01), Tsuji et al.
patent: 5355283 (1994-10-01), Marrs et al.
patent: 5475236 (1995-12-01), Yoshizaki
patent: 5508556 (1996-04-01), Lin
Kasai Junichi
Nomoto Ryuuji
Onodera Masanori
Orimo Seiichi
Sakoda Hideharu
Duong Hung Van
Fahmy Wael
Fujitsu Limited
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