Semiconductor device having trench isolation layer and a...

Semiconductor device manufacturing: process – Chemical etching

Reexamination Certificate

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C438S690000, C438S424000, C438S454000, C438S710000, C438S720000, C438S978000, C257S397000, C257S510000, C257S522000, C257S216000, C257S080000, C257S097000

Reexamination Certificate

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10734354

ABSTRACT:
A semiconductor device having a trench isolation layer in a semiconductor substrate is provided, wherein the trench isolation layer includes a silicon nitride liner, a silicon oxide liner; and a buried layer, wherein the buried layer includes a first buried layer for filling a lower part of the trench isolation layer and a second buried layer for filling an upper part of the trench isolation layer. A semiconductor device preferably further includes a silicon oxide layer disposed between the semiconductor substrate and the silicon nitride liner. The silicon oxide layer includes a thermal oxide layer densified at a temperature over about 800° C.

REFERENCES:
patent: 5728621 (1998-03-01), Zheng et al.
patent: 5770260 (1998-06-01), Fukuyama et al.
patent: 5801083 (1998-09-01), Yu et al.
patent: 6051480 (2000-04-01), Moore et al.
patent: 6127241 (2000-10-01), Rha
patent: 6187651 (2001-02-01), Oh
patent: 03-263352 (1991-11-01), None
patent: 1020010001735 (2001-01-01), None

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