Semiconductor device having stressed etch stop layers of...

Details Semiconductor device having stressed etch stop layers of... Semiconductor device having stressed etch stop layers of...

2006-12-08

2010-06-08

Ghyka, Alexander G (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S199000, C438S238000, C257SE21335, C257SE21663

Reexamination Certificate

active

07732291

ABSTRACT:
By selectively performing a pre-amorphization implantation process in logic areas and memory areas, the negative effect of the interaction between stressed overlayers and dislocation defects may be avoided or at least significantly reduced in the memory areas, thereby increasing production yield and stability of the memory areas.

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Letter and Official Communication Dated Mar. 6, 2007; German Application No. 10 2006 019 936.7-33.

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