Semiconductor device having resistance based memory array,...

Details Semiconductor device having resistance based memory array,... Semiconductor device having resistance based memory array,...

2011-04-05

2011-04-05

Dinh, Son (Department: 2824)

Static information storage and retrieval

Read/write circuit

Particular read circuit

C365S189011

Reexamination Certificate

active

07920432

ABSTRACT:
One embodiment includes a non-volatile memory cell array, and a read unit configured to disable read operation for the non-volatile memory cell array for a time period following writing of data in the non-volatile memory cell array.

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K. Pagiamtzis et al., “Content-Addressable Memory (CAM) Circuits and Architectures: A Tutorial and Survey 'Content- addressable memory”, Wikipedia article, Apr. 26, 2008.

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