Semiconductor device having reduced sub-threshold leakage

Details Semiconductor device having reduced sub-threshold leakage Semiconductor device having reduced sub-threshold leakage

2011-03-01

2011-03-01

Lee, Calvin (Department: 2892)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C257S330000

Reexamination Certificate

active

07897465

ABSTRACT:
A semiconductor device fabricated in the semiconductor substrate includes a FinFET transistor having opposed source and drain pillars, and a fin interposed between the source and drain pillars. A cavity is formed in the semiconductor substrate extending at least partially between the fin and the semiconductor substrate. The cavity may be formed within a shallow trench isolation structure, and it may also extend at least partially between the semiconductor substrate and one or both of the pillars. The cavities increase the impedance between the semiconductor substrate and the fin and/or pillars to decrease the sub-threshold leakage of the FinFET transistor.

REFERENCES:
patent: 7442618 (2008-10-01), Chong et al.
patent: 7470588 (2008-12-01), Cho et al.
patent: 7696568 (2010-04-01), Hwang et al.

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