Semiconductor device having pillar shaped transistor and a metho

Details Semiconductor device having pillar shaped transistor and a metho Semiconductor device having pillar shaped transistor and a metho

1994-08-30

1997-03-18

Loke, Steven H.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257329, 257330, 257331, 257332, 257301, H01L 27108, H01L 2976, H01L 2994, H01L 31119

Patent

active

056125593

ABSTRACT:
A vertically structured transistor and method for manufacturing the same achieves a highly integrated semiconductor device. A pillar is vertically formed on a semiconductor substrate and forms a channel region of the transistor. A gate electrode is formed in a self-alignment fashion so as to surround the sides of the pillar with a gate insulating film imposed therebetween. A source region and a drain region are formed in a lower portion and an upper portion of the pillar, respectively. The area occupied by a transistor according to the present invention is remarkably reduced.

REFERENCES:
patent: 5336917 (1994-08-01), Kohyama
patent: 5357131 (1994-10-01), Sunami et al.

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